Date of Award

8-2026

Document Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

Degree Discipline

Electrical Engineering

Abstract

Image enhancement is a critical component of modern intelligent systems, including medical imaging, remote sensing, autonomous navigation, surveillance, industrial inspection, and lowlight vision applications. Recent transformer-based image restoration networks have demonstrated significant improvements over traditional convolutional approaches by leveraging self-attention mechanisms to capture long-range feature dependencies. The computationally intensive attention mechanism is typically executed prior to later convolution and reconstruction stages. Among these architectures, SWINIR has emerged as a state-of-the-art framework for image restoration and super-resolution. However, the computational complexity of transformer operations, present significant challenges for deployment on resource-constrained FPGA (Field Programmable Gate Array) platforms.

This dissertation investigated hardware-efficient architectural techniques for accelerating transformer-based image restoration on low-cost FPGA devices, with emphasis on the Xilinx Zybo Z7 Z020 platform. As AI algorithms continue to increase in complexity, implementing entire networks on FPGA devices becomes increasingly impractical. Instead, selectively accelerating computationally intensive functions, such as the attention mechanism, provides a more scalable approach for edge-AI systems. Small FPGA realizations are important because they can coexist with other processing functions, reducing the need for frequent device reconfiguration during multitasking operation. The Zybo Z7 Z020 was therefore selected as the target platform to demonstrate meaningful transformer acceleration on a small FPGA device. The ViTA vision transformer accelerator demonstrated the feasibility of transformer inference on Zynq-7020-class devices and served as the baseline for this work.

Building upon this, a SWINIR-based accelerator pipeline was designed and implemented, including hardware realizations of Query, Key, Value (QKV) projection, attention-score computation, softmax normalization, value aggregation, layer normalization, and multi-layer perceptron (MLP) processing. Lightweight architectural techniques were incorporated to improve execution efficiency while maintaining compatibility with resource-constrained FPGA platforms.

Experimental results demonstrated improvements in throughput and hardware efficiency compared with the ViTA baseline while maintaining low power consumption and acceptable image restoration quality. The results showed that computationally intensive transformer functions can be efficiently accelerated on small FPGA devices and integrated into larger systems alongside other hardware functions. Overall, this dissertation established the feasibility of transformer-based image restoration on low-cost FPGA platforms and provides a foundation for future edge-AI hardware accelerators.

Index Terms - Edge artificial intelligence (edge AI), field-programmable gate array (FPGA), hardware accelerator, image enhancement, image restoration, shifted window image restoration (SwinIR), softmax, transformer accelerator, vision transformer (ViT).

Committee Chair/Advisor

Suxia Cui

Committee Member

Akshay Kulkarni

Committee Member

Justin Foreman

Committee Member

Cajetan Akujuobi

Committee Member

Yonghui Wang

Rights

© 2021 Prairie View A & M University

Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.

Date of Digitization

7/27/2026

Contributing Institution

J B Coleman Library

City of Publication

Prairie View

MIME Type

Application/PDF

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